5,331 research outputs found

    Lattice Magnetic Walks

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    Sums of walks for charged particles (e.g. Hofstadter electrons) on a square lattice in the presence of a magnetic field are evaluated. Returning loops are systematically added to directed paths to obtain the unrestricted propagators. Expressions are obtained for special values of the magnetic flux-per-plaquette commensurate with the flux quantum. For commensurate and incommensurate values of the flux, the addition of small returning loops does not affect the general features found earlier for directed paths. Lattice Green's functions are also obtained for staggered flux configurations encountered in models of high-Tc superconductors.Comment: 31 pages, Plain TeX, 2 figures (available upon request), UR-CM-93-10-1

    Nucleon structure functions with domain wall fermions

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    We present a quenched lattice QCD calculation of the first few moments of the polarized and un-polarized structure functions of the nucleon. Our calculations are done using domain wall fermions and the DBW2 gauge action with inverse lattice spacing ~1.3GeV, physical volume approximatelly (2.4 fm)^3, and light quark masses down to about 1/4 the strange quark mass. Values of the individual moments are found to be significantly larger than experiment, as in past lattice calculations, but interestingly the chiral symmetry of domain wall fermions allows for a precise determination of the ratio of the flavor non-singlet momentum fraction to the helicity distribution, which is in very good agreement with experiment. We discuss the implications of this result. Next, we show that the chiral symmetry of domain wall fermions is useful in eliminating mixing of power divergent lower dimensional operators with twist-3 operators. Finally, we find the isovector tensor charge at renormalization scale 2 GeV in the MS bar scheme to be 1.192(30), where the error is the statistical error only.Comment: 41 pages, 17 figure

    Looking for ultralight dark matter near supermassive black holes

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    Measurements of the dynamical environment of supermassive black holes (SMBHs) are becoming abundant and precise. We use such measurements to look for ultralight dark matter (ULDM), which is predicted to form dense cores ("solitons") in the centre of galactic halos. We search for the gravitational imprint of an ULDM soliton on stellar orbits near Sgr A* and by combining stellar velocity measurements with Event Horizon Telescope imaging of M87*. Finding no positive evidence, we set limits on the soliton mass for different values of the ULDM particle mass mm. The constraints we derive exclude the solitons predicted by a naive extrapolation of the soliton-halo relation, found in DM-only numerical simulations, for 2×10−20 eV≲m≲8×10−19 eV2\times10^{-20}~{\rm eV}\lesssim m\lesssim8\times10^{-19}~{\rm eV} (from Sgr A*) and m≲4×10−22 eVm\lesssim4\times10^{-22}~{\rm eV} (from M87*). However, we present theoretical arguments suggesting that an extrapolation of the soliton-halo relation may not be adequate: in some regions of the parameter space, the dynamical effect of the SMBH could cause this extrapolation to over-predict the soliton mass by orders of magnitude.Comment: 9 pages + appendices, 5 + 2 figures. v2: some clarifications and references added; conclusions unchanged; version published in JCAP. v3: few typos correcte

    Modular Exponentiation on Reconfigurable Hardware

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    It is widely recognized that security issues will play a crucial role in the majority of future computer and communication systems. A central tool for achieving system security are cryptographic algorithms. For performance as well as for physical security reasons, it is often advantageous to realize cryptographic algorithms in hardware. In order to overcome the well-known drawback of reduced flexibility that is associated with traditional ASIC solutions, this contribution proposes arithmetic architectures which are optimized for modern field programmable gate arrays (FPGAs). The proposed architectures perform modular exponentiation with very long integers. This operation is at the heart of many practical public-key algorithms such as RSA and discrete logarithm schemes. We combine two versions of Montgomery modular multiplication algorithm with new systolic array designs which are well suited for FPGA realizations. The first one is based on a radix of two and is capable of processing a variable number of bits per array cell leading to a low cost design. The second design uses a radix of sixteen, resulting in a speed-up of a factor three at the cost of more used resources. The designs are flexible, allowing any choice of operand and modulus. Unlike previous approaches, we systematically implement and compare several versions of our new architecture for different bit lengths. We provide absolute area and timing measures for each architecture on Xilinx XC4000 series FPGAs. As a first practical result we show that it is possible to implement modular exponentiation at secure bit lengths on a single commercially available FPGA. Secondly we present faster processing times than previously reported. The Diffie-Hellman key exchange scheme with a modulus of 1024 bits and an exponent of 160 bits is computed in 1.9 ms. Our fastest design computes a 1024 bit RSA decryption in 3.1 ms when the Chinese remainder theorem is applied. These times are more than ten times faster than any reported software implementation. They also outperform most of the hardware-implementations presented in technical literature
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